IIT Madras ETM Lectures: Electronic Testing and Measurement
EE4108100 lectures12 weeks
Weeks
- Week 110 lecturesIntroduction to electronic testing · Electronic testing in system level context · Productization · Consumer expectations and market requirements · Why testing is important in electronics · Types of testing · Exercise · A3: Additional resources - example - reliability testing · A2: Additional resources - example - production testing · A1: Additional resources - summary
- Week 214 lecturesIntro to digital circuits · Physical faults (nand gate) · Intro to Fault Models · Stuck at fault model of a nand gate · Bridge fault model · General theory of test generation · Diagnosis and diagnostic resolution · Backtracking and it's importance · Problem solving · A8: Fft analysis · A7: Multimeter and oscilloscope · A6: Sensors · A5: Measurement uncertainty · A4: Measurement errors
- Week 37 lecturesFault Equivalence, Dominance and Compaction in Digital Circuits · Fault Activation, Propagation, and Observability · Understanding Test Pattern Generation · Redundancy and Untestable Faults in Practical Circuits · Industry Practices and Achieving Test Coverage Goals · D and D-bar Notation in Fault Simulation · Test Vector Generation and Fault Simulation Tools
- Week 44 lecturesD Algorithm & PODEM for ATPG, Algorithm Comparisons · Probem solving - D algorithm, PODEM · Controllability & Observability · SCOAP algorithm and DFT (Design for Test)
- Week 57 lecturesIntroduction to Sequential Testing · Sequential Circuits—Nature, Setup, and Verification · Functional Testing vs. Structural/White-Box Testing · Full Adder implementation (Circuit verse) · Counter - Implementation and Functional verification · Check Point Theorem · Iterative Array Model and C- testability
- Week 610 lecturesChallenges in Sequential Testing · Scan-Based Testing:Scan Flip-Flops and Register Architecture · Scan Register: Demonstration (circuitverse) · Scan-Based Testing: Fault Injection, Penalties, Pipelining & DFT · Scan Chain Architecture, Integration and Practical Test Challenges · Power Mangement in DFT and Scan Chain Testing · Summary So Far - A Midpoint Reflection on Digital Testing · Intro to Logic BIST: LFRS and PRS · Pseudo-Random Pattern Generation · Demonstration: LFSR and Charecteristic Polynomial (circuitvese)
- Week 710 lecturesLFSR Construction and Conceptual Verification · Limitations of External/Conventional Testing · BIST : Benefits and Trade-offs · Test Point Insertion · Signature Resgisters: SISR, Golden Signature · MISR · BILBO Register · Fault Models: Stuck-At, Bridging · Fault Models: Open, Timing Faults · Speed Binning and Performance-Based Sorting
- Week 88 lecturesPath Delay Faults & Transition Delay Faults: Modeling · Path Delay Faults & Transition Delay Faults: Testing · Transition Delay Models: Launch Strategies · LOC & LOS · IDDQ Testing · Cell Aware Faults · Quality vs Reliability · Statistical Reliability
- Week 97 lecturesLFSR: Galois (Demonstration) · MISR (Demonstration) · Demonstration (contd...) · Stumps Architecture and LFSR with NOR · Scan Test Compression · Illinois Scan Architechture · Summary - So far
- Week 109 lecturesIntro to Memory Testing: 6T SRAM · 2D SRAM Array · SRAM: Memory Fault Models · Memory Testing Patterns · Marching Test Algorithm and Memory BIST · Memory BIST: Hamming Codes · Memory BIST: Hamming Codes - Implementation · Read Only Memory · Recent Memory Innovations and Their Testing Challenges: A Research Perspective
- Week 117 lecturesIntro to Analog and Mixed Signal Testing · Parametric Faults and Characterisation · Concept of Analog Tester · Falstad Demonstration · LT Spice Demonstration · LT Spice Demonstration (Contd...) · Analog Testing - Industrial Perspective
- Week 127 lecturesSystem Evolution & Packaging Technologies · Board Testing & JTAG Architecture · Advanced JTAG: Debugging & Mixed-Signal Testing · Reliability, Economics & Technology Scaling · Hardware Security & Automotive Requirements · Intelligent Manufacturing & Safety Standards · Advanced Defects, Screening & Course Conclusion