IIT Madras Digital Systems Lectures
EE110292 lectures12 weeks
Weeks
- Week 17 lecturesIntroduction | foundations of logic & modern microprocessors · Course structure | foundations of logic design, fsms, & verilog preparation · Digital compute & logic representation from analog signals to logic levels · Experiment voltage transfer characteristics | NAND gate inverter · Small signal analysis | gain & logic thresholds · Theory- voltage transfer characteristics | logic thresholds & noise margins · Noise margin | how inverters tolerate noise & ensure reliable logic levels
- Week 29 lecturesBinary number system | logic levels, base conversion & weighing balance analogy · Binary representation of decimal numbers |integers, fractions & bit ranges · Hexadecimal & octal representation of decimal numbers | base conversion & number system · Relation between binary & hexadecimal representation | binary to hexdecimal conversion · Relation between binary & octal representation | grouping method & base conversion · Relation between hexadecimal & octal representation | conversion methods & binary bridge · Signed magnitude representation of negative nos. in binary systems · 2’s complement representation intuition | binary encoding of signed numbers · Ranges of the signed magnitude & 2’s complement representation | bit width & limits
- Week 38 lecturesSign extension for unsigned & signed number | understanding 2's complement · Sign extension for 2’s complement representation | bit growth & min bit count · Negative of a number using 2’s complement | bit flip, add one, & binary proof · Logic gates: AND, OR | hardware implementation, truth tables & programming link · Logic gates: XOR, NAND, NOR, XNOR | truth tables, parity, & applications · Truth table for basic gates | circuit analysis & boolean simplification · Truth table for large input circuits | why boolean simplification matters · Introduction to boolean algebra | logic operators, truth tables & boolean expressions
- Week 48 lecturesProperties in boolean algebra | distributive, absorption & simplification rule · De-Morgan's Laws | logic simplification, inversion, & boolean proofs · Boolean simplification · Canonical sum of products representation | truth tables, minterms & simplification · Implementing boolean function with minimum gates · Minterm representation of boolean expressions | truth table & logic design · Canonical products of sum representation | maxterms, truth table & duality · Maxterm representation of boolean expressions
- Week 55 lecturesBoolean simplification using karnaugh map · 3-Variable K map | gray code & boolean simplification · 4-Variable K map | gray code & boolean simplification · K- Map with don't care condition · Designing logic circuits using K- maps | real-world seatbelt & door system
- Week 68 lecturesImplementing boolean expression using AND,OR,NOT gates simplified · Universal gates · Implementing XOR gate using NAND gates · Decoders · Multiplexers · Tristate inverter · Delay of logic gates | rise & fall time, output capacitance & transistor delay · Static timing analysis | delay, arrival time & gate selection explained
- Week 78 lectures2:4 Decoder using 3:8 Decoder | reuse logic to build smaller decoders efficiently · 2:4 Decoder using 3:8 Decoder | reuse logic to build smaller decoders efficiently · 6:64 Decoder using 3:8 Decoders | scalable design with enable logic & hierarchy · 7:128 Decoder using 3:8 Decoders | scalable logic design with enable control · Implementing multiplexers using decoders & tri-state logic · Higher order Mux using lower order Mux | hierarchical design of multiplexers · Encoders | basics, truth table, & priority encoder design · Priority encoder | handling valid input detection & truth table correction
- Week 87 lecturesImplementing boolean function using decoders | logic via decoder & OR gates · Implementing boolean function using multiplexers · Implementing boolean function using look up table | decoder & memory based LUT · Unsigned & signed binary addition logic for CPU design explained · Ripple carry adder | state machines, delays, & timing · Magnitude comparator | build 1-bit & 4-bit comparators using logic gates · Binary coded decimal to binary conversion | 4-bit comparator & adder logic
- Week 98 lecturesIntroduction to sequential circuits | timing, flip-flops, & state behavior · Designing a counter using ripple carry adder | state machines, delays, & timing · D-flip flop | Programmable delay, edge triggering, counters, & timing control · D-latch| timing control basics · Master slave d-flip flop | edge triggering, timing parameters · Tri-state inverter based d-latch | timing, transparency, & signal control · Tri-state inverter based master slave D-Flip Flop · Function table of d-l;atch | sequential vs combinational logic & latch behavior
- Week 107 lecturesS-R latch · Clocked s-r latch · T-flip flop · JK-flip flop · Registers | 4-bit register, controlled parallel load, multiplexers, & timing · Shift registers | serial & parallel transfer, piso design, & timing diagrams · Scan chain | parallel-in-serial-out (PISO) shift registers & serial-in-serial-out (SISO)
- Week 116 lecturesIntroduction to finite state machine (FSM) | basics, block diagram, timing, analysis · Analysis of D-flipflop based FSMs · Analysis of JK-flipflop based FSMs | state transition design · Analysis of T-flipflop based FSMs | state equations, reset, table, & diagram · Designing sequence detector using D-FlipFlops · Designing sequence detector using JK-FlipFlops
- Week 1211 lecturesDesigning 3-bit counter using D-FlipFlops · Designing counters using full adders | logic, D flip-flops, increment control · Counters with parallel load | 3-bit design & more · Pipelining · Maximum operating frequency of pipelined circuits · Designing non overlapping clock generator using flip flops & logic gates · Cirtical path analysis | clock timing, delay, setup time, frequency limit · Asynchronous sequential circuits · Application of Digital System Error Correction · Application of Digital System- Hamming Code-Part-1 · Application of Digital System- Hamming Code - Part - 2