IIT Madras Computer Organisation Lectures
EE210675 lectures11 weeks
Weeks
- Week 16 lecturesModule introduction · X86 architecture · X86 instruction set · Assembly program exercise · Memory segments · Immediate data access
- Week 27 lecturesJump instructions - part 1 · Jump instructions - part 2 · Stack instructions · Swap example in assembly · Call and ret instructions · String instruction - movsb · String instruction - scasb, cmpsb
- Week 37 lecturesIntroduction to inline assembly programming · Multiplication example · String length example · Function to swap variables · Preprocessor · Compiler and linker · Object file
- Week 47 lecturesCompilation · Execution flow and stack · Prologue and epilogue · Passing fewer arguments · Passing more arguments · Pushing parameters · Calling convention - __fastcall
- Week 59 lecturesMemory alignment - i · Memory alignment - ii · Implementation of printf · Pass by value · Pass by pointer · Recursive function · Recursion vs loop - effect on stack · Security of local variables · C++ - "this" pointer
- Week 66 lecturesSequential Adder · Elements of a datapath · Register File · Op Code · Timing Analysis for Register File · Register File Write Back
- Week 77 lecturesRISC vs CISC · Compilation Example: RISC vs CISC · Interpreting Machine Code · Op Code Construction · Machine Code in RISC · Other Instruction Formats · Pseudo Instructions
- Week 87 lecturesSingle Cycle Datapath - Load Word · Single Cycle Datapath - More Instructions · Single Cycle Control Path · Single Cycle Extended Instructions · Single Cycle Performance Introduction · Single Cycle Performance R-Type · Single Cycle Performance Store and Load Word
- Week 97 lecturesx86 vs RISC-V · Multicycle Processor Motivation · Multicycle Data and Control Path · Multicycle vs Single Cycle Performance · Pipelined Processor Motivation · Pipelined Processor Timing Representation · Pipelined Processor Data and Control Path
- Week 106 lecturesTwo Stage Pipelined Processor · Read After Write · Data Hazards · Control Hazards · Timing Analysis of 5 Stage Pipelined Processor - I · Timing Analysis of 5 Stage Pipelined Processor - II
- Week 116 lecturesProblem Sloving_Stuck-at-0 · Problem Sloving adding instructions · Problem Sloving adding complex instructions · Advanced Microarchitecture-1 · Advanced Microarchitecture-2 · Cache Memory